Intel’s $3.5 Billion Investment Culminates in the Opening of the State-of-the-Art Fab 9 in New Mexico

In 2021, Intel’s CEO Pat Gelsinger announced a significant investment of $3.5 billion in one of its facilities in Rio Rancho, New Mexico. By early 2024, Intel successfully opened its advanced Fab 9 factory in the state, completing its development phase.

This investment by Intel in Rio Rancho represents a substantial opportunity to increase employment, the Fab 9 factory has enabled the hiring of hundreds of technical employees, in addition to creating 3,500 other jobs throughout the state.

Keyvan Esfarjani, Intel’s Executive Vice President and Chief Global Operations Officer, commented on this significant opening: “Today, we celebrate the inauguration of the United States’ first and only facility producing the world’s most advanced electronic component assembly and processor chip packaging solutions.

Intel’s Cutting Edge technology offers our clients real advantages in performance enhancement, chip architecture, and significant flexibility in design. Congratulations to the New Mexico team, the entire Intel family, our suppliers, and our contracting partners who relentlessly push the boundaries of packaging innovation.”

Fab 9 will focus on producing advanced packaging technologies EMIB and Foveros, according to Intel’s official statement, these technologies, used by Intel for chip stacking, are also adopted in designing multi-chip modules known as Chiplets.

Notably, AMD utilizes this design with its central processing units and graphics processing units produced by the semiconductor giant TSMC. Intel’s Foveros technology, which stacks chips vertically (chip-on-chip), has been used in its Meteor Lake central processing units.

Furthermore, Intel’s Fab 9 and Fab 11x facilities are the first of Intel’s massive plants to produce 3D packaging technology in large volumes, these facilities can manufacture the stacking stages, assemble them, and produce them as an integrated chip, this allows for much better productivity than having to ship incomplete parts of the chip architecture to several other factories.